News · 2026-08-04

High Bandwidth Flash Became a Spec Today, Not a Product You Can Buy

SK hynix and Sandisk announced the first standard specifications for High Bandwidth Flash at FMS 2026 on August 4. HBF defines a NAND-based memory tier meant to sit behind HBM and ahead of conventional SSD storage in AI inference systems: two stack configurations of eight or sixteen dies, capacity up to 512 gigabytes, and three bandwidth grades spanning roughly 0.4 to about 3 terabytes a second. Neither company named an accelerator, a product SKU, a price, or a general-availability date.

Key facts

• Two physical stack configurations - eight or sixteen NAND dies - with capacity to 512GB and three bandwidth grades, the top one near three terabytes a second.
• Sandisk's published timetable: first memory samples in the second half of 2026, first inference-device samples in early 2027.
• HBF won FMS's 2025 "Most Innovative Technology" award in the NAND-flash category.
• Primary sources: the SK hynix announcement and Sandisk's HBF fact sheet.

What it actually is

Not an SSD with an ambitious controller. HBF starts with NAND flash - the same technology in your laptop's drive - but puts it in a dense 3D package and wires it directly to a processor rather than out through a storage interface. Sandisk's design description adds BiCS NAND with CMOS bonded directly to the array, and a sixteen-die stack engineered to control warpage and heat, which is the sort of thing that decides whether a package is manufacturable at all.

Two properties make NAND attractive here. It is non-volatile, so it burns no power keeping its contents alive - unlike DRAM, which refreshes constantly. And it is far denser than HBM, so a similar package envelope holds vastly more.

Why a new tier at all

Today's AI accelerators have a cliff. HBM is fast and small; storage is large and far away. Anything that does not fit in HBM has to be fetched across PCIe from an SSD, which is orders of magnitude slower and, for mixture-of-experts models, exactly the wrong shape - because which weights you need next depends on the token you just processed.

HBF proposes filling the gap: a processor-adjacent, very wide, read-oriented pool for weights. Hot state stays in HBM; the big weight reservoir lives one step away instead of a bus away.

The analogy is a kitchen. HBM is the counter - immediate, small. Storage is the warehouse across town. HBF is the walk-in pantry: bigger than the counter, slower to reach than the counter, and enormously better than driving to the warehouse every time you need flour.

Sandisk is straightforward about the tradeoff: HBF has higher latency and larger page sizes than HBM. Its bet is that massive parallelism makes the read bandwidth good enough for inference even though the latency is worse. That is a real bet, and it is workload-specific - which is why the pitch is inference, not training.

The number to be careful with

Sandisk's most quoted claim is that an HBF-backed system lands within 2.2% of unlimited HBM. Read the methodology: it is an internal simulation using 8-bit pretrained Llama 3.1 405B weights, modelling one kernel at a time, against a comparator with unlimited HBM capacity. That is useful evidence about the intended workload. It is not a product benchmark, and the company says as much in its own engineering blog.

Why it matters

This is the datacentre answer to a problem local-inference builders are solving by hand right now. On the same day, a llama.cpp contributor published a patch that learns which experts to keep in VRAM while you type, and an operator demonstrated the full Kimi K3 running across sixteen networked boxes. Every one of these is the same question in different clothes: once the model exceeds fast memory, how fast can the next tier feed it?

HBF's answer is to move the next tier next to the processor. If it works, "the model fits only if I spread it across expensive VRAM or a pile of server RAM" becomes a tiering problem rather than a capacity wall. That would change what a single accelerator can hold by a large multiple.

The honest caveat

Three things temper this. First, timing: samples in 2027 means silicon you can buy is further out still, and this is an accelerator architecture, not an upgrade path for a PC. Second, openness: SK hynix says the specification was disclosed through the Open Compute Project as an open industry standard, but OCP currently lists High Bandwidth Flash as a semi-private workstream, where participation requires membership and agreements. The public announcement supplies headline parameters, not a downloadable interface document.

Third, the endorsements are close to the vendor. David Patterson, who leads Sandisk's advisory board, and Raja Koduri have both spoken favourably - as advisers to the company proposing the standard. The FMS award is genuine industry recognition and still not proof of performance or manufacturability. What today establishes is that two of the three largest NAND makers agree on a common interface. That is meaningful, and it is a long way from a part in a socket.

Primary source, verified: read the paper →

Ground Truth. (2026, August 4). High Bandwidth Flash Became a Spec Today, Not a Product You Can Buy. Ground Truth. https://groundtruth.day/news/high-bandwidth-flash-became-a-spec-today-not-a-product.html

@misc{groundtruth:high-bandwidth-flash-became-a-spec-today-not-a-product,
  title  = {High Bandwidth Flash Became a Spec Today, Not a Product You Can Buy},
  author = {{Ground Truth}},
  year   = {2026},
  month  = {aug},
  url    = {https://groundtruth.day/news/high-bandwidth-flash-became-a-spec-today-not-a-product.html}
}

Topics: hardware · memory · inference · sk-hynix · sandisk · hbm · moe · datacenter